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 INTEGRATED CIRCUITS
74LV20 Dual 4-input NAND gate
Product data Supersedes data of 1998 Apr 20 2003 Mar 10
Philips Semiconductors
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
FEATURES
* Optimized for Low Voltage applications: 1.0 V to 3.6 V * Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V * Typical VOLP (output ground bounce) < 0.8 V @ VCC = 3.3 V, * Typical VOHV (output VOH undershoot) > 2 V @ VCC = 3.3 V, * Output capability: standard * ICC category: SSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 C; tr =tf 2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB, nC, nD to nY Input capacitance Power dissipation capacitance per gate Tamb = 25 C Tamb = 25 C
DESCRIPTION
The 74LV20 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT20. The 74LV20 provides the 4-input NAND function.
CONDITIONS CL = 15 pF VCC = 3.3 V Notes 1 and 2
TYPICAL 8 3.5 22
UNIT ns pF pF
NOTES: 1 CPD is used to determine the dynamic power dissipation (PD in W) PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: N = number of outputs switching; fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of the outputs. 2 The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES 14-Pin Plastic SO TEMPERATURE RANGE -40 C to +125 C ORDER CODE 74LV20D PKG. DWG. # SOT108-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER SYMBOL 1A to 2A 1B to 2B NC 1C to 2C 1D to 2D 1Y to 2Y GND VCC Data inputs Data inputs No connection Data inputs Data inputs Data outputs Ground (0 V) Positive supply voltage FUNCTION
1A 1B NC 1C 1D 1Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 2D 2C NC 2B 2A 2Y
1, 9 2, 10 3, 11 4, 12 5, 13 6, 8 7 14
SV00360
2003 Mar 10
2
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
LOGIC SYMBOL (IEEE/IEC)
LOGIC SYMBOL
1 2 4 5
& 1 6 2 4 5 1A 1B 1Y 1C 1D 6
9 10 12 13
& 9 8 10 12 13 2A 2B 2Y 2C 2D 8
SV00362
SV00361
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS nA L nB X L X X H nC X X L X H nD X X X L H OUTPUTS nY H H H H L
A B Y C D
X X X H
NOTES: H = HIGH voltage level L = LOW voltage level X = Don't care
SV00363
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air See DC and AC characteristics VCC = 1.0 V to 2.0 V tr, tf Input rise and fall times VCC = 2.0 V to 2.7 V VCC = 2.7 V to 3.6 V PARAMETER CONDITIONS See Note1 MIN 1.0 0 0 -40 -40 - - - - - - TYP. 3.3 - - MAX 3.6 VCC VCC +85 +125 500 200 100 UNIT V V V C ns/V ns/V ns/V
NOTE: 1 The LV is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2 V to VCC = 3.6 V.
2003 Mar 10
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Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK IOK IO IGND, ICC Tstg PTOT DC supply voltage DC input diode current DC output diode current DC output source or sink current (standard outputs) DC VCC or GND current for types with standard outputs Storage temperature range Power dissipation per package -plastic mini-pack (SO) for temperature range: -40 C to +125 C above +70 C derate linearly with 8 mW/K VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V PARAMETER CONDITIONS RATING -0.5 to +4.6 20 50 25 50 -65 to +150 500 UNIT V mA mA mA mA C mW
NOTES: 1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS VCC = 1.2 V VIH HIGH level Input voltage VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 1.2 V VIL LOW level Input O voltage VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 1.2 V; VI = VIH or VIL; -IO = 100 A VO OH HIGH level output voltage; all outputs VCC = 2.0 V; VI = VIH or VIL; -IO = 100 A VCC = 2.7 V; VI = VIH or VIL; -IO = 100 A VCC = 3.0 V; VI = VIH or VIL; -IO = 100 A VOH HIGH level output voltage; STANDARD outputs VCC = 3.0 V; VI = VIH or VIL; -IO = 6 mA VCC = 1.2 V; VI = VIH or VIL; IO = 100 A VO OL LOW level output voltage; all outputs VCC = 2.0 V; VI = VIH or VIL; IO = 100 A VCC = 2.7 V; VI = VIH or VIL; IO = 100 A VCC = 3.0 V; VI = VIH or VIL; IO = 100 A VOL II ICC ICC LOW level output voltage; STANDARD outputs Input leakage current Quiescent supply current; SSI Additional quiescent supply current per input VCC = 3.0 V; VI = VIH or VIL; IO = 6 mA VCC = 3.6 V; VI = VCC or GND VCC = 3.6 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC -0.6 V 1.8 2.5 2.8 2.40 1.2 2.0 2.7 3.0 2.82 0 0 0 0 0.25 0.2 0.2 0.2 0.40 1.0 20.0 0.2 0.2 0.2 0.50 1.0 40 V A A A V 1.8 2.5 2.8 2.20 V V 0.9 1.4 2.0 0.3 0.6 0.8 -40 C to +85 C MIN TYP1 MAX -40 C to +125 C MIN 0.9 1.4 2.0 0.3 0.6 0.8 V V MAX UNIT
500
850
NOTE: 1 All typical values are measured at Tamb = 25 C.
2003 Mar 10
4
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
AC CHARACTERISTICS
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 1 k SYMBOL PARAMETER WAVEFORM CONDITION VCC (V) 1.2 tPHL/tPLH Propagation delay g y nA, nB, nC, nD to nY Figures 1 2 1, 2.0 2.7 3.0 to 3.6 NOTE: 1 Unless otherwise stated, all typical values are at Tamb = 25 C. 2 Typical value measured at VCC = 3.3 V. MIN - - - - LIMITS -40 to +85 C TYP1 50 17 13 102 MAX - 32 24 19 LIMITS -40 to +125 C MIN - - - - MAX - 39 29 23 ns UNIT
AC WAVEFORMS
VM = 1.5 V at VCC 2.7 V 3.6 V VM = 0.5 V * VCC at VCC < 2.7 V VOL and VOH are the typical output voltage drop that occur with the output load.
TEST CIRCUIT
VCC
VI PULSE GENERATOR VI nA, nB, nC, nD INPUT GND tPHL VOH nY OUTPUT VM TEST VOL tPLH/tPHL < 2.7V 2.7-3.6V VCC 2.7V VCC VI tPLH VM RT D.U.T.
VO
50pF CL
RL = 1k
Test Circuit for switching times DEFINITIONS
RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00364
Figure 1.Input (nA, nB, nC, nD) to output (nY) propagation delays.
SV00901
Figure 2. Load circuitry for switching times.
2003 Mar 10
5
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
2003 Mar 10
6
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
REVISION HISTORY
Rev _4 Date 20030310 Description Product data (9397 750 11224). ECN 853-1962 29493 of 07 February 2003. Supersedes Product specification of 1998 Apr 20 (9397 750 04411).
* Delete DIL, SSOP and TSSOP package ordering and package outlines (discontinued options). * Quick Reference Data: Correct power dissipation formula in Note 1.
_3 19980420 Product specification (9397 750 04411). ECN 853-1962 19256 of 20 April 1998. Supersedes data of 1997 Mar 28.
Modifications:
2003 Mar 10
7
Philips Semiconductors
Product data
Dual 4-input NAND gate
74LV20
Data sheet status
Level
I
Data sheet status [1]
Objective data
Product status [2] [3]
Development
Definitions
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data
Qualification
III
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2003 All rights reserved. Printed in U.S.A. Date of release: 03-03
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 11224
Philips Semiconductors
2003 Mar 10 8


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